--
--
-- v9938.vhd
--
--
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
entity v9938 is
port(
pSltClk21 : IN std_logic;
pSltClk : IN std_logic;
pSltRst_n : IN std_logic;
pSltSltsl_n : IN std_logic;
pSltIorq_n : IN std_logic;
pSltRd_n : IN std_logic;
pSltWr_n : IN std_logic;
pSltAdr : IN std_logic_vector(15 downto 0);
pSltDat : INOUT std_logic_vector(7 downto 0);
pSltBdir_n : OUT std_logic;
pSltCs1 : IN std_logic;
pSltCs2 : IN std_logic;
pSltCs12 : IN std_logic;
pSltRfsh_n : IN std_logic;
pSltWait_n : IN std_logic;
pSltInt_n : IN std_logic;
pSltM1_n : IN std_logic;
pSltMerq_n : IN std_logic;
-- pSltClk2 : IN std_logic;
pSltRsv5 : OUT std_logic;
pSltRsv16 : OUT std_logic;
pRamCeX_n : OUT std_logic;
pRamOeX_n : OUT std_logic;
pRamWeX_n : OUT std_logic;
pRamAdrX : OUT std_logic_vector(18 downto 0);
pRamDatX : INOUT std_logic_vector(7 downto 0);
-- pRamCeY_n : OUT std_logic;
-- pRamOeY_n : OUT std_logic;
-- pRamWeY_n : OUT std_logic;
-- pRamAdrY : OUT std_logic_vector(18 downto 0);
-- pRamDatY : INOUT std_logic_vector(7 downto 0);
-- Vide Output
pVideoR : OUT std_logic_vector( 5 downto 0);
pVideoG : OUT std_logic_vector( 5 downto 0);
pVideoB : OUT std_logic_vector( 5 downto 0);
pVideoHS_n : OUT std_logic;
pVideoVS_n : OUT std_logic;
pVideoCS_n : OUT std_logic;
-- CXA1645 signal
pVideoSC : OUT std_logic;
pVideoSYNC : OUT std_logic
);
end v9938;
architecture RTL of v9938 is
signal pSltClk_n : std_logic;
-- H counter
signal h_counter : std_logic_vector(10 downto 0);
-- V counter
signal v_counter : std_logic_vector(10 downto 0);
-- 画面表示開始位置(adjust=(0,0)時)
constant OFFSET_X : std_logic_vector := "0110110"; -- = 220/4;
constant OFFSET_Y : std_logic_vector := "0101110"; -- = 92/2;
signal adjust_x : std_logic_vector( 6 downto 0);
signal adjust_y : std_logic_vector( 6 downto 0);
-- dot state register
signal dotState : std_logic_vector( 1 downto 0);
signal dotResetState : std_logic_vector( 1 downto 0);
signal field : std_logic;
-- sync state register
signal sstate : std_logic_vector( 1 downto 0);
constant sstate_A : std_logic_vector := "00";
constant sstate_B : std_logic_vector := "01";
constant sstate_C : std_logic_vector := "10";
constant sstate_D : std_logic_vector := "11";
signal VideoHS_n : std_logic;
signal VideoVS_n : std_logic;
-- グラフィック表示エリア検出用
signal window_x :std_logic;
signal window_y :std_logic;
signal window :std_logic;
signal pwindow_x :std_logic;
signal pwindow_y :std_logic;
signal pwindow :std_logic;
signal spwindow_ec :std_logic;
signal spwindow :std_logic;
signal spwindow_x :std_logic;
signal spwindow_y :std_logic;
signal spwindow_ecx :std_logic;
signal g123window : std_logic;
signal g123window_y : std_logic;
signal g123window_x : std_logic;
-- 周辺枠エリア検出用
signal bwindow_x :std_logic;
signal bwindow_y :std_logic;
signal bwindow :std_logic;
-- dot counter
signal dotCounter_x : std_logic_vector( 8 downto 0);
signal dotCounter_y : std_logic_vector( 8 downto 0);
-- dot counter - 8 ( fifo addr )
signal pdotCounter_x : std_logic_vector( 8 downto 0);
signal pdotCounter_y : std_logic_vector( 8 downto 0);
signal VramReadFreeFlag : std_logic;
-- 3.58MHz generator
signal cpuClockCounter :std_logic_vector( 2 downto 0);
-- slot control
signal IopAcs : std_logic;
signal IopAcs0 : std_logic;
signal IopAcs1 : std_logic;
-- VDP register access
signal VdpP1Is1stByte : std_logic;
signal VdpP2Is1stByte : std_logic;
signal VdpP0Data : std_logic_vector( 7 downto 0);
signal VdpP1Data : std_logic_vector( 7 downto 0);
signal VdpRegPtr : std_logic_vector( 5 downto 0);
signal VdpRegWrPulse : std_logic;
signal VdpVramAccessAddr : std_logic_vector( 16 downto 0);
signal VdpVramAccessData : std_logic_vector( 7 downto 0);
signal VdpVramAccessAddrTmp : std_logic_vector( 16 downto 0);
signal VdpVramAddrSetReq : std_logic;
signal VdpVramAddrSetAck : std_logic;
signal VdpVramAccessRw : std_logic;
signal VdpVramWrReq : std_logic;
signal VdpVramWrAck : std_logic;
signal VdpVramAccessing : std_logic;
signal VdpR0DispNum : std_logic_vector(3 downto 1);
signal VdpR1DispMode : std_logic_vector(1 downto 0);
signal VdpR1SpSize : std_logic;
signal VdpR1SpZoom : std_logic;
signal VdpR1DispOn : std_logic;
signal VdpR2PtnNameTblBaseAddr : std_logic_vector( 6 downto 0);
signal VdpR4PtnGeneTblBaseAddr : std_logic_vector( 5 downto 0);
signal VdpR10R3ColorTblBaseAddr : std_logic_vector( 10 downto 0);
signal VdpR11R5SpAttrTblBaseAddr : std_logic_vector( 6 downto 0);
signal VdpR6SpPtnGeneTblBaseAddr : std_logic_vector( 5 downto 0);
signal VdpR7FrameColor : std_logic_vector( 7 downto 0);
signal VdpR8SpOff : std_logic;
signal VdpR9InterraceMode : std_logic;
signal VdpR9TwoPageMode : std_logic;
signal VdpR9YDots : std_logic;
signal VdpR16PalNum : std_logic_vector( 3 downto 0);
signal VdpR17RegNum : std_logic_vector( 5 downto 0);
signal VdpR17IncRegNum : std_logic;
signal VdpR23VStartLine : std_logic_vector( 7 downto 0);
-- signal VdpR18Adjust : std_logic;
signal VdpModeGraphic1 : std_logic; -- グラフィック１モード
signal VdpModeGraphic2 : std_logic; -- グラフィック２，３モード
signal VdpModeGraphic4 : std_logic; -- グラフィック４モード
signal VdpModeGraphic7 : std_logic; -- グラフィック７モード
-- Color Code
signal colorCode : std_logic_vector( 7 downto 0);
signal colorR : std_logic_vector( 2 downto 0);
signal colorG : std_logic_vector( 2 downto 0);
signal colorB : std_logic_vector( 2 downto 0);
-- for graphic 1
signal G1PtnNum : std_logic_vector( 7 downto 0);
signal G1PPattern : std_logic_vector( 7 downto 0);
signal G1Pattern : std_logic_vector( 7 downto 0);
signal G1Color : std_logic_vector( 7 downto 0);
signal G1ColorCode : std_logic_vector( 3 downto 0);
-- for graphic 4
signal G4ColorCode : std_logic_vector( 3 downto 0);
-- for graphic 7
signal G7ColorCode : std_logic_vector( 7 downto 0);
-- sprite
signal SpPreReading : std_logic;
signal SpPreReadState : std_logic_vector( 2 downto 0);
constant spstate_idle : std_logic_vector := "000";
constant spstate_yread : std_logic_vector := "001";
constant spstate_xread : std_logic_vector := "010";
constant spstate_ptnnumread : std_logic_vector := "011";
constant spstate_ptnread1 : std_logic_vector := "111";
constant spstate_ptnread2 : std_logic_vector := "110";
constant spstate_colorread : std_logic_vector := "100";
signal SpMode2 : std_logic;
signal SpPreReadCounter : std_logic_vector( 4 downto 0);
signal SpPreReadCounter2 : std_logic_vector( 3 downto 0);
signal SpPreReadPtnNum : std_logic_vector( 7 downto 0);
signal SpY : std_logic_vector( 7 downto 0);
signal SpPreReadY : std_logic_vector( 7 downto 0);
signal spColorCode : std_logic_vector( 3 downto 0);
signal SpCCis0 : std_logic;
signal SpDispEnd : std_logic;
constant SpMode2_nSprites: integer := 4;
type spbitVec is array( 0 to SpMode2_nSprites-1 ) of std_logic;
type sppatternVec is array( 0 to SpMode2_nSprites-1 ) of std_logic_vector(16 downto 0);
type spxVec is array( 0 to SpMode2_nSprites-1 ) of std_logic_vector(8 downto 0);
type spcolorVec is array( 0 to SpMode2_nSprites-1 ) of std_logic_vector(3 downto 0);
signal SpColorIn : spbitVec;
signal SpPattern : sppatternVec;
signal SpX : spxVec;
signal SpColor : spcolorVec;
signal SpCC : spbitVec;
signal SpEC : spbitVec;
signal SpIC : spbitVec;
component Ram
port(
address : IN std_logic_vector(7 downto 0);
inclock : IN std_logic;
we : IN std_logic;
data : IN std_logic_vector(7 downto 0);
q : OUT std_logic_vector(7 downto 0)
);
end component;
signal fifoAddr : std_logic_vector( 7 downto 0);
signal fifoAddr_in : std_logic_vector( 3 downto 0);
signal fifoAddr_out : std_logic_vector( 3 downto 0);
signal fifoWe : std_logic;
signal fifoIn : std_logic;
signal fifoData_in : std_logic_vector( 7 downto 0);
signal fifoData_out : std_logic_vector( 7 downto 0);
-- palette registers
type paletteVec is array( 0 to 15 ) of std_logic_vector(2 downto 0);
signal paletteR : paletteVec;
signal paletteG : paletteVec;
signal paletteB : paletteVec;
begin
----------------------------------------------------------------
-- 8byte FIFO control
----------------------------------------------------------------
fifoAddr <= ( "0000" & fifoAddr_in ) when (fifoIn = '1') else
( "0000" & fifoAddr_out );
fifoData_in <= pRamDatX;
fifoWe <= '1' when fifoIn = '1' else '0';
fifoMem : Ram port map(fifoAddr, pSltClk21, fifoWe, fifoData_in, fifoData_out);
----------------------------------------------------------------
-- Dummy pin
----------------------------------------------------------------
pSltClk_n <= not pSltClk;
pVideoCS_n <= not (VideoHS_n xor VideoVS_n);
pVideoHS_n <= VideoHS_n;
pVideoVS_n <= VideoVS_n;
-- to CXA1645
pVideoSYNC <= not (VideoHS_n xor VideoVS_n);
pVideoSC <= cpuClockCounter(2);
process( pSltClk21, pSltRst_n )
begin
if (pSltRst_n = '0') then
h_counter <= (others => '0');
v_counter <= (others => '0');
VideoHS_n <= '1';
VideoVS_n <= '1';
cpuClockCounter <= (others => '0');
sstate <= (others => '0' );
field <= '0';
elsif (pSltClk21'event and pSltClk21 = '1') then
-- 3.58MHz generator, 6分周回路
case cpuClockCounter is
when "000" => cpuClockCounter <= "001";
when "001" => cpuClockCounter <= "011";
when "011" => cpuClockCounter <= "111";
when "111" => cpuClockCounter <= "110";
when "110" => cpuClockCounter <= "100";
when "100" => cpuClockCounter <= "000";
when others => cpuClockCounter <= "000";
end case;
if( h_counter = 1363 ) then
h_counter <= (others => '0' );
else
h_counter <= h_counter + 1;
end if;
if( (h_counter = 681) or (h_counter = 1363) ) then
-- 525 ライン * 2 = 1050
if( v_counter = 1049 ) then
if(h_counter = 1363) then
v_counter <= (others => '0');
end if;
else
v_counter <= v_counter + 1;
end if;
end if;
if( (v_counter = 0) or
(v_counter = 12) or
((v_counter = 525) and VdpR9InterraceMode = '1') or
((v_counter = 526) and VdpR9InterraceMode = '0') or
((v_counter = 537) and VdpR9InterraceMode = '1') or
((v_counter = 538) and VdpR9InterraceMode = '0') )then
sstate <= sstate_A;
elsif( (v_counter = 6) or
((v_counter = 531) and VdpR9InterraceMode = '1') or
((v_counter = 532) and VdpR9InterraceMode = '0') )then
sstate <= sstate_B;
elsif( (v_counter = 18) or
((v_counter = 543) and VdpR9InterraceMode = '1') or
((v_counter = 544) and VdpR9InterraceMode = '0') )then
sstate <= sstate_C;
end if;
-- field 信号生成
if( v_counter = 525 ) then
field <= '1';
elsif( v_counter = 0 ) then
field <= '0';
end if;
-- H syncパルス発生
if( sstate = sstate_A ) then
if( (h_counter = 1) or (h_counter = 1+682) ) then
VideoHS_n <= '0'; -- pulse on
elsif( (h_counter = 51) or (h_counter = 51+682) ) then
VideoHS_n <= '1'; -- pulse off
end if;
elsif( sstate = sstate_B ) then
if( (h_counter = 1364-100+1) or (h_counter = 682-100+1) ) then
VideoHS_n <= '0'; -- pulse on
elsif( (h_counter = 1) or (h_counter = 1+682) ) then
VideoHS_n <= '1'; -- pulse off
end if;
elsif( sstate = sstate_C ) then
if( h_counter = 1 ) then
VideoHS_n <= '0'; -- pulse on
elsif( h_counter = 101 ) then
VideoHS_n <= '1'; -- pulse off
end if;
end if;
-- V syncパルス発生
if( sstate = sstate_B ) then
VideoVS_n <= '0';
else
VideoVS_n <= '1';
end if;
end if;
end process;
-- pwindow, window 信号生成
pwindow <= (pwindow_x and pwindow_y);
window <= (window_x and window_y);
g123window <= (g123window_x and g123window_y);
spwindow_ec <= spwindow_ecx and spwindow_y;
spwindow <= spwindow_x and spwindow_y;
process( pSltClk21, pSltRst_n )
begin
if (pSltRst_n = '0') then
dotCounter_x <= (others =>'0');
dotCounter_y <= (others =>'0');
pdotCounter_x <= (others =>'0');
pdotCounter_y <= (others =>'0');
window_x <= '0';
window_y <= '0';
pwindow_x <= '0';
pwindow_y <= '0';
bwindow <= '0';
bwindow_x <= '0';
bwindow_y <= '0';
spwindow_x <= '0';
spwindow_y <= '0';
spwindow_ecx <= '0';
g123window_y <= '0';
g123window_x <= '0';
VramReadFreeFlag <= '0';
elsif (pSltClk21'event and pSltClk21 = '1') then
if( h_counter = ("00" & adjust_x & "10" ) ) then
pwindow_x <= '1';
g123window_x <= '1';
elsif( (h_counter( 1 downto 0) = "10") and ( pdotCounter_x = 255 ) ) then
pwindow_x <= '0';
g123window_x <= '0';
end if;
if( (v_counter = ("0000" & (adjust_y+1) & '0') ) or (v_counter = 526+("0000" & (adjust_y+1) & '0')) ) then
pwindow_y <= '1';
window_y <= '1';
g123window_y <= '1';
elsif( (VdpR9YDots = '1' and ( (VdpModeGraphic7 = '1') or (VdpModeGraphic4='1') ) ) and
( (v_counter = ("0000" & (adjust_y+1) & '0')+212*2) or (v_counter = 526+("0000" & (adjust_y+1) & '0')+212*2) ) ) then
pwindow_y <= '0';
window_y <= '0';
g123window_y <= '0';
elsif( (v_counter = ("0000" & (adjust_y+1) & '0')+192*2) or (v_counter = 526+("0000" & (adjust_y+1) & '0')+192*2) ) then
pwindow_y <= '0';
window_y <= '0';
g123window_y <= '0';
end if;
if( (v_counter = ("0000" & adjust_y & '0') ) or (v_counter = 526+("0000" & adjust_y & '0')) ) then
spwindow_y <= '1';
elsif( (v_counter = ("0000" & adjust_y & '0')+212*2) or (v_counter = 526+("0000" & adjust_y & '0')+212*2) ) then
spwindow_y <= '0';
end if;
if( (h_counter( 1 downto 0) = "10") and ( pdotCounter_x = 7 ) ) then
window_x <= '1';
elsif( (h_counter( 1 downto 0) = "10") and ( pdotCounter_x = 255 ) ) then
window_x <= '0';
end if;
-- if( (h_counter( 1 downto 0) = "10") and ( pdotCounter_x = 7- ) and (window_y = '1') ) then
-- elsif( (h_counter( 1 downto 0) = "10") and ( pdotCounter_x = 255 ) ) then
-- end if;
if( h_counter = ("00" & ( adjust_x - 24 -2) & "10" ) ) then
spwindow_ecx <= '1';
elsif( h_counter = ("00" & ( adjust_x + 8 -2) & "10" ) ) then
spwindow_x <= '1';
elsif( (h_counter( 1 downto 0) = "10") and ( pdotCounter_x = 255 ) ) then
spwindow_x <= '0';
spwindow_ecx <= '0';
end if;
-- 32回に一かい vram アクセス用に vramバスを開放
if( h_counter = ("00" & adjust_x & "10") ) then
pdotCounter_x <= (others =>'0');
VramReadFreeFlag <= '0';
if( v_counter = ("000" & adjust_y & '0') ) then
dotCounter_y <= '0' & (VdpR23VStartLine - 1);
elsif( v_counter = ("000" & adjust_y & '0')+526 ) then
dotCounter_y <= '0' & (VdpR23VStartLine - 1);
else
dotCounter_y <= dotCounter_y + 1;
end if;
elsif( (h_counter( 1 downto 0) = "10") and (VramReadFreeFlag = '0') ) then
pdotCounter_x <= pdotCounter_x + 1;
if( pdotCounter_x( 4 downto 0 ) = "11111" ) then
VramReadFreeFlag <= '1';
end if;
elsif( (h_counter( 1 downto 0) = "10") and (VramReadFreeFlag = '1') ) then
VramReadFreeFlag <= '0';
end if;
if( h_counter = ("00" & adjust_x & "10") ) then
dotCounter_x <= "111111000"; -- -8
elsif( h_counter( 1 downto 0) = "10") then
dotCounter_x <= dotCounter_x + 1;
end if;
if( h_counter = 1363 ) then
if( v_counter = ("0000" & adjust_y & '1') ) then
pdotCounter_y <= '0' & VdpR23VStartLine;
elsif( v_counter = ("0000" & adjust_y & '1')+526 ) then
pdotCounter_y <= '0' & VdpR23VStartLine;
else
pdotCounter_y <= dotCounter_y + 1;
end if;
end if;
-- bwindow 信号生成
if( h_counter = 200-1 ) then
bwindow_x <= '1';
elsif( h_counter = 1363-1 ) then
bwindow_x <= '0';
end if;
if( (v_counter = 10*2-1) or (v_counter = 525+10*2-1) ) then
bwindow_y <= '1';
elsif( (v_counter = 524-1) or (v_counter = 525+524-1) ) then
bwindow_y <= '0';
end if;
if( (bwindow_x = '1') and (bwindow_y = '1') )then
bwindow <= '1';
else
bwindow <= '0';
end if;
end if;
end process;
-- color generator
process( pSltClk21, pSltRst_n )
begin
if (pSltRst_n = '0') then
dotState <= (others => '0' );
colorCode <= (others => '0' );
colorR <= (others => '0' );
colorG <= (others => '0' );
colorB <= (others => '0' );
pVideoR <= "000000";
pVideoG <= "000000";
pVideoB <= "000000";
VdpVramWrAck <= '0';
pRamAdrX <= (others => '0');
-- pRamAdrY <= (others => '0');
pRamDatX <= (others => 'Z');
-- pRamDatY <= (others => 'Z');
pRamOeX_n <= '1';
pRamWeX_n <= '1';
-- pRamOeY_n <= '1';
-- pRamWeY_n <= '1';
VdpVramAccessing <= '0';
SpPreReading <= '0';
elsif (pSltClk21'event and pSltClk21 = '1') then
if( h_counter = 1363) then
dotState <= "00";
else
case dotState is
when "00" =>
dotState <= "01";
when "01" =>
dotState <= "11";
when "11" =>
dotState <= "10";
when "10" =>
dotState <= "00";
when others => null;
end case;
end if;
-- main state
case dotState is
when "10" =>
pRamCeX_n <= '0';
-- pRamCeY_n <= '1';
-- pRamOeY_n <= '1';
if( (VdpModeGraphic7 = '1') and (pWindow = '1') and (VramReadFreeFlag = '0' ) and (VdpR1DispOn='1') ) then
pRamAdrX <= ("00" & VdpR2PtnNameTblBaseAddr(5) & pdotCounter_y( 7 downto 0) & pdotCounter_x( 7 downto 0));
pRamDatX <= (others => 'Z' );
pRamOeX_n <= '0';
pRamWeX_n <= '1';
elsif( (VdpModeGraphic4 = '1') and (pWindow = '1') and (VramReadFreeFlag = '0' ) and (dotCounter_x(0) = '1') and (VdpR1DispOn='1') ) then
pRamAdrX <= ("00" & VdpR2PtnNameTblBaseAddr(6 downto 5) & pdotCounter_y( 7 downto 0) & pdotCounter_x( 7 downto 1));
pRamDatX <= (others => 'Z' );
pRamOeX_n <= '0';
pRamWeX_n <= '1';
elsif( (VdpModeGraphic1 = '1') and (g123Window = '1') and dotcounter_x(0) = '1' and (VdpR1DispOn='1') ) then
-- screen 1
pRamDatX <= (others => 'Z' );
pRamOeX_n <= '0';
pRamWeX_n <= '1';
case dotCounter_x(2 downto 0) is
when "011" =>
-- read pattern name table
pRamAdrX <= ("00" & VdpR2PtnNameTblBaseAddr & dotCounter_y(7 downto 3) & (dotCounter_x(7 downto 3)+1) );
when "101" =>
-- read pattern Generator table
pRamAdrX <= ("00" & VdpR4PtnGeneTblBaseAddr & G1PtnNum & dotCounter_y(2 downto 0) );
when "111" =>
-- read color table
pRamAdrX <= ("00" & VdpR10R3ColorTblBaseAddr & '0' & G1PtnNum( 7 downto 3 ) );
when others =>
null;
end case;
elsif( (VdpModeGraphic2 = '1') and (g123Window = '1') and dotcounter_x(0) = '1' and (VdpR1DispOn='1') ) then
-- screen 2, 4
pRamDatX <= (others => 'Z' );
pRamOeX_n <= '0';
pRamWeX_n <= '1';
case dotCounter_x(2 downto 0) is
when "011" =>
-- read pattern name table
pRamAdrX <= ("00" & VdpR2PtnNameTblBaseAddr & dotCounter_y(7 downto 3) & (dotCounter_x(7 downto 3)+1) );
when "101" =>
-- read pattern Generator table
pRamAdrX <= ("00" & VdpR4PtnGeneTblBaseAddr(5 downto 2) & dotCounter_y(7 downto 6) & G1PtnNum & dotCounter_y(2 downto 0) ) and
("001111" & VdpR4PtnGeneTblBaseAddr(1 downto 0) & "11111111" & "111");
when "111" =>
-- read color table
pRamAdrX <= ("00" & VdpR10R3ColorTblBaseAddr(10 downto 7) & dotCounter_y(7 downto 6) & G1PtnNum & dotCounter_y(2 downto 0) ) and
("001111" & VdpR10R3ColorTblBaseAddr(6 downto 0) & "111111" );
when others =>
null;
end case;
elsif( (SpPreReadState /= spstate_idle) and (VdpR8SpOff='0') and
( VramReadFreeFlag = '0') )then
SpPreReading <= '1';
pRamDatX <= (others => 'Z' );
pRamOeX_n <= '0';
pRamWeX_n <= '1';
case SpPreReadState is
when spstate_yread =>
pRamAdrX <= ("00" & VdpR11R5SpAttrTblBaseAddr & '1' & not SpMode2 & '0' & SpPreReadCounter & "00");
when spstate_xread =>
pRamAdrX <= ("00" & VdpR11R5SpAttrTblBaseAddr & '1' & not SpMode2 & '0' & SpPreReadCounter & "01");
when spstate_ptnnumread =>
pRamAdrX <= ("00" & VdpR11R5SpAttrTblBaseAddr & '1' & not SpMode2 & '0' & SpPreReadCounter & "10");
when spstate_colorread =>
if( SpMode2 = '0' ) then
pRamAdrX <= ("00" & VdpR11R5SpAttrTblBaseAddr & '1' & not SpMode2 & '0' & SpPreReadCounter & "11");
else
-- sprite color table
pRamAdrX <= ("00" & VdpR11R5SpAttrTblBaseAddr & "0" & SpPreReadCounter & SpPreReadY( 3 downto 0));
end if;
when spstate_ptnread1 =>
if( VdpR1SpSize = '0' ) then
-- 8x8 mode
pRamAdrX <= ("00" & VdpR6SpPtnGeneTblBaseAddr &
SpPreReadPtnNum( 7 downto 0) & SpPreReadY( 2 downto 0) );
else
-- 16x16 mode
pRamAdrX <= ("00" & VdpR6SpPtnGeneTblBaseAddr &
SpPreReadPtnNum( 7 downto 2) & '0' & SpPreReadY( 3 downto 0) );
end if;
when spstate_ptnread2 =>
if( VdpR1SpSize = '0' ) then
-- 8x8 mode
null;
else
-- 16x16 mode
pRamAdrX <= ("00" & VdpR6SpPtnGeneTblBaseAddr &
SpPreReadPtnNum( 7 downto 2) & '1' & SpPreReadY( 3 downto 0) );
end if;
when others =>
null;
end case;
elsif( VdpVramWrReq /= VdpVramWrAck ) then
VdpVramAccessing <= '1';
VdpVramWrAck <= not VdpVramWrAck;
-- elsif( VdpVramRdReq /= VdpVramRdAck ) then
-- pRamAdrX <= "00" & VdpVramAccessAddrTmp(16 downto 0);
end if;
if( bwindow = '1' ) then
pVideoR <= '0' & colorR & "00";
pVideoG <= '0' & colorG & "00";
pVideoB <= '0' & colorB & "00";
else
pVideoR <= (others => '0');
pVideoG <= (others => '0');
pVideoB <= (others => '0');
pVideoB <= (others => '0');
end if;
when "00" =>
if( VdpVramAccessing = '1' ) then
pRamAdrX <= ("00" & VdpVramAccessAddr(16 downto 0));
if( VdpVramAccessRw = '0' ) then
pRamDatX <= VdpVramAccessData;
pRamOeX_n <= '1';
pRamWeX_n <= '0';
else
pRamDatX <= (others => 'Z' );
pRamOeX_n <= '0';
pRamWeX_n <= '1';
end if;
end if;
when "01" =>
if( (window = '1') and (VdpR1DispOn = '1') ) then
if( (SpPattern(0)(16) = '1') or (SpPattern(1)(16) = '1') or
(SpPattern(2)(16) = '1') or (SpPattern(3)(16) = '1')
-- (SpPattern(4)(16) = '1') or (SpPattern(5)(16) = '1') or
-- (SpPattern(6)(16) = '1') or (SpPattern(7)(16) = '1')
) then
colorCode <= "0000" & spColorCode;
elsif( VdpModeGraphic1 = '1' ) then
colorCode <= "0000" & G1ColorCode;
elsif( VdpModeGraphic2 = '1' ) then
colorCode <= "0000" & G1ColorCode;
elsif( VdpModeGraphic4 = '1' ) then
colorCode <= "0000" & G4ColorCode;
elsif( VdpModeGraphic7 = '1' ) then
colorCode <= G7ColorCode;
end if;
else
colorCode <= VdpR7FrameColor;
end if;
when "11" =>
pRamWeX_n <= '1';
-- pRamWeY_n <= '1';
pRamOeX_n <= '1';
-- pRamOeY_n <= '1';
pRamDatX <= (others => 'Z' );
-- pRamDatY <= (others => 'Z' );
if( VdpVramAccessing = '1' ) then
VdpVramAccessing <= '0';
end if;
if( VdpModeGraphic7 = '1' ) then
colorR <= colorCode( 4 downto 2 );
colorG <= colorCode( 7 downto 5 );
colorB <= colorCode( 1 downto 0 ) & colorCode(1);
else
colorR <= paletteR( conv_integer( colorCode( 3 downto 0) ) );
colorG <= paletteG( conv_integer( colorCode( 3 downto 0) ) );
colorB <= paletteB( conv_integer( colorCode( 3 downto 0) ) );
end if;
if( SpPreReading = '1' ) then
SpPreReading <= '0';
end if;
when others => null;
end case;
end if;
end process;
process( pSltClk21, pSltRst_n )
begin
if (pSltRst_n = '0') then
G1ColorCode <= (others => '0');
G1PtnNum <= (others => '0');
G1Pattern <= (others => '0');
G1Color <= (others => '0');
G4ColorCode <= (others => '0');
G7ColorCode <= (others => '0');
fifoAddr_in <= (others => '0');
fifoAddr_out <= (others => '0');
fifoIn <= '0';
elsif (pSltClk21'event and pSltClk21 = '1') then
-- graphic 1,2,3 state
case dotState is
when "10" =>
null;
when "00" =>
if( G1Pattern(7) = '1' ) then
G1ColorCode <= G1Color(7 downto 4);
else
G1ColorCode <= G1Color(3 downto 0);
end if;
G1Pattern <= G1Pattern(6 downto 0) & '0';
when "01" =>
case dotCounter_x(2 downto 0) is
when "011" =>
-- read pattern name table
G1PtnNum <= pRamDatX;
when "101" =>
-- read pattern Generator table
G1PPattern <= pRamDatX;
when "111" =>
-- read color table
G1Color <= pRamDatX;
G1Pattern <= G1PPattern;
when others =>
null;
end case;
when "11" =>
null;
when others => null;
end case;
-- graphic 4 state
case dotState is
when "10" =>
null;
when "00" =>
if( window = '1' ) then
if( dotCounter_x(0) = '1' ) then
fifoAddr_out <= fifoAddr_out + 1;
G4colorCode <= fifoData_out(7 downto 4);
else
G4colorCode <= fifoData_out(3 downto 0);
end if;
end if;
if( (pWindow = '1') and (VramReadFreeFlag = '0' ) and (dotCounter_x(0) = '1') ) then
fifoIn <= '1';
end if;
when "01" =>
if( (pWindow = '1') and (VramReadFreeFlag = '0' ) and (dotCounter_x(0) = '1') ) then
fifoIn <= '0';
fifoAddr_in <= fifoAddr_in + 1;
end if;
when "11" =>
if( pDotCounter_x = 255 ) then
fifoAddr_in <= (others => '0');
fifoAddr_out <= (others => '0');
end if;
when others => null;
end case;
-- graphic 7 state
case dotState is
when "10" =>
null;
when "00" =>
if( window = '1' ) then
fifoAddr_out <= fifoAddr_out + 1;
G7colorCode <= fifoData_out;
end if;
if( (pWindow = '1') and (VramReadFreeFlag = '0' ) ) then
fifoIn <= '1';
end if;
when "01" =>
if( (pWindow = '1') and (VramReadFreeFlag = '0' ) ) then
fifoIn <= '0';
fifoAddr_in <= fifoAddr_in + 1;
end if;
when "11" =>
if( pDotCounter_x = 255 ) then
fifoAddr_in <= (others => '0');
fifoAddr_out <= (others => '0');
end if;
when others => null;
end case;
end if;
end process;
-- スプライト表示
process( SpColor, SpPattern, SpCC, SpMode2 )
begin
if( SpMode2 = '0' ) then
spColorCode(3) <= (SpColorIn(0) and SpPattern(0)(16)) or
( not SpPattern(0)(16) and
(SpColorIn(1) and SpPattern(1)(16)) ) or
( not SpPattern(0)(16) and not SpPattern(1)(16) and
(SpColorIn(2) and SpPattern(2)(16)) ) or
( not SpPattern(0)(16) and not SpPattern(1)(16) and not SpPattern(2)(16) and
(SpColorIn(3) and SpPattern(3)(16)) );
else
spColorCode(3) <= (
(SpColorIn(0) and SpPattern(0)(16)) or
(SpColorIn(1) and SpPattern(1)(16) and SpCC(1) )
-- (SpColorIn2 and SpPattern2(16) and SpCC1 and SpCC2 )
-- (SpColorIn3 and SpPattern3(16) and SpCC1 and SpCC2 and SpCC3 ) or
-- (SpColorIn4 and SpPattern4(16) and SpCC1 and SpCC2 and SpCC3 and SpCC4 ) or
-- (SpColorIn5 and SpPattern5(16) and SpCC1 and SpCC2 and SpCC3 and SpCC4 and SpCC5 ) or
-- (SpColorIn6 and SpPattern6(16) and SpCC1 and SpCC2 and SpCC3 and SpCC4 and SpCC5 and SpCC6 ) or
-- (SpColorIn7 and SpPattern7(16) and SpCC1 and SpCC2 and SpCC3 and SpCC4 and SpCC5 and SpCC6 and SpCC7 )
) or (
( not SpPattern(0)(16) and not SpCC(1) ) and (
(SpColorIn(1) and SpPattern(1)(16) ) or
(SpColorIn(2) and SpPattern(2)(16) and SpCC(2) )
-- (SpColorIn3 and SpPattern3(16) and SpCC2 and SpCC3 ) or
-- (SpColorIn4 and SpPattern4(16) and SpCC2 and SpCC3 and SpCC4 ) or
-- (SpColorIn5 and SpPattern5(16) and SpCC2 and SpCC3 and SpCC4 and SpCC5 ) or
-- (SpColorIn6 and SpPattern6(16) and SpCC2 and SpCC3 and SpCC4 and SpCC5 and SpCC6 ) or
-- (SpColorIn7 and SpPattern7(16) and SpCC2 and SpCC3 and SpCC4 and SpCC5 and SpCC6 and SpCC7 )
)
) or (
( not SpPattern(0)(16) and not SpPattern(1)(16) and not SpCC(2) ) and (
(SpColorIn(2) and SpPattern(2)(16) ) or
(SpColorIn(3) and SpPattern(3)(16) and SpCC(3) )
-- (SpColorIn4 and SpPattern4(16) and SpCC3 and SpCC4 ) or
-- (SpColorIn5 and SpPattern5(16) and SpCC3 and SpCC4 and SpCC5 ) or
-- (SpColorIn6 and SpPattern6(16) and SpCC3 and SpCC4 and SpCC5 and SpCC6 ) or
-- (SpColorIn7 and SpPattern7(16) and SpCC3 and SpCC4 and SpCC5 and SpCC6 and SpCC7 )
)
) or (
( not SpPattern(0)(16) and not SpPattern(1)(16) and not SpPattern(2)(16) and not SpCC(3) ) and (
(SpColorIn(3) and SpPattern(3)(16) )
-- (SpColorIn(4) and SpPattern(4)(16) and SpCC(4) ) or
-- (SpColorIn5 and SpPattern5(16) and SpCC4 and SpCC5 ) or
-- (SpColorIn6 and SpPattern6(16) and SpCC4 and SpCC5 and SpCC6 ) or
-- (SpColorIn7 and SpPattern7(16) and SpCC4 and SpCC5 and SpCC6 and SpCC7 )
)
-- ) or (
-- ( not SpPattern(0)(16) and not SpPattern(1)(16) and not SpPattern(2)(16) and not SpPattern(3)(16) and not SpCC(4) ) and (
-- (SpColorIn(4) and SpPattern(4)(16) ) or
-- (SpColorIn(5) and SpPattern(5)(16) and SpCC(5) )
-- (SpColorIn6 and SpPattern6(16) and SpCC5 and SpCC6 ) or
-- (SpColorIn7 and SpPattern7(16) and SpCC5 and SpCC6 and SpCC7 )
-- )
-- ) or (
-- ( not SpPattern(0)(16) and not SpPattern(1)(16) and not SpPattern(2)(16) and not SpPattern(3)(16) and
-- not SpPattern(4)(16) and not SpCC(5) ) and (
-- (SpColorIn(5) and SpPattern(5)(16) )
-- (SpColorIn6 and SpPattern6(16) and SpCC6 ) or
-- (SpColorIn7 and SpPattern7(16) and SpCC6 and SpCC7 )
-- )
-- ) or (
-- ( not SpPattern0(16) and not SpPattern1(16) and not SpPattern2(16) and not SpPattern3(16) and
-- not SpPattern4(16) and not SpPattern5(16) and not SpCC6 ) and (
-- (SpColorIn6 and SpPattern6(16) ) or
-- (SpColorIn7 and SpPattern7(16) and SpCC7 )
-- )
-- ) or (
-- ( not SpPattern0(16) and not SpPattern1(16) and not SpPattern2(16) and not SpPattern3(16) and
-- not SpPattern4(16) and not SpPattern5(16) and not SpPattern6(16) and not SpCC7 ) and (
-- (SpColorIn7 and SpPattern7(16) )
-- )
);
end if;
end process;
process( pSltClk21, pSltRst_n )
begin
if (pSltRst_n = '0') then
for i in 0 to SpMode2_nSprites -1 loop
SpPattern(i) <= (others => '0');
SpColor(i) <= (others => '0');
SpColorIn(i) <= '0';
SpX(i) <= (others => '0');
SpIC(i) <= '0';
SpEC(i) <= '0';
SpCC(i) <= '0';
end loop;
SpDispEnd <= '0';
SpCCis0 <= '0';
spColorCode(2 downto 0) <= (others => '0' );
SpPreReadPtnNum <= (others => '0' );
SpPreReadY <= (others => '0' );
SpPreReadState <= (others => '0' );
SpPreReadCounter <= (others => '0' );
SpPreReadCounter2 <= (others => '0' );
elsif (pSltClk21'event and pSltClk21 = '1') then
case dotState is
when "10" =>
for i in 0 to SpMode2_nSprites-1 loop
SpColorIn(i) <= SpColor(i)(2);
end loop;
spColorCode(1) <= spColorCode(3);
if( (pDotCounter_x = 255) and (spwindow_y = '1') ) then
SpPreReadState <= spstate_idle;
SpPreReadCounter <= (others => '0');
SpPreReadCounter2 <= (others => '0');
SpY <= dotCounter_y( 7 downto 0);
end if;
when "00" =>
for i in 0 to SpMode2_nSprites-1 loop
SpColorIn(i) <= SpColor(i)(3);
end loop;
spColorCode(2) <= spColorCode(3);
when "01" =>
for i in 0 to SpMode2_nSprites-1 loop
SpColorIn(i) <= SpColor(i)(0);
end loop;
if( SpPreReading = '1' ) then
case SpPreReadState is
when spstate_yread =>
SpPreReadY <= SpY - pRamDatX;
if( pRamDatX = "11010000" ) then -- Y=208
SpDispEnd <= '1';
end if;
when spstate_xread =>
SpX(conv_integer(SpPreReadCounter2)) <= '0' & pRamDatX;
when spstate_ptnnumread =>
SpPreReadPtnNum <= pRamDatX;
when spstate_colorread =>
if( pRamDatX(6) = '0' ) then
SpCCis0 <= '1';
end if;
SpColor(conv_integer(SpPreReadCounter2)) <= pRamDatX( 3 downto 0);
SpEC(conv_integer(SpPreReadCounter2)) <= pRamDatX(7);
SpCC(conv_integer(SpPreReadCounter2)) <= pRamDatX(6);
SpIC(conv_integer(SpPreReadCounter2)) <= pRamDatX(5);
when spstate_ptnread1 =>
if( (SpMode2 = '1' and SpCCis0 = '1') or (SpMode2 = '0') ) then
SpPattern(conv_integer(SpPreReadCounter2))(16 downto 8) <= '0' & pRamDatX;
end if;
when spstate_ptnread2 =>
if( VdpR1SpSize = '0' ) then
-- 8x8 mode
SpPattern(conv_integer(SpPreReadCounter2))(7 downto 0) <= (others => '0');
else
-- 16x16 mode
if( (SpMode2 = '1' and SpCCis0 = '1') or (SpMode2 = '0') ) then
SpPattern(conv_integer(SpPreReadCounter2))(7 downto 0) <= pRamDatX;
end if;
end if;
when others =>
null;
end case;
else
for i in 0 to SpMode2_nSprites - 1 loop
if( SpX(i)(8) = '1') then
if( (VdpR1SpZoom='0') or (VdpR1SpZoom='1' and (SpX(i)(0)='0')) ) then
SpPattern(i) <= SpPattern(i)(15 downto 0) & '0';
end if;
end if;
if( spwindow = '1' ) then
SpX(i) <= SpX(i) - 1;
elsif( spwindow_ec = '1' ) then
if( SpEC(i)='1' ) then
SpX(i) <= SpX(i) - 1;
end if;
end if;
end loop;
end if;
when "11" =>
for i in 0 to SpMode2_nSprites - 1 loop
SpColorIn(i) <= SpColor(i)(1);
end loop;
spColorCode(0) <= spColorCode(3);
if( SpPreReadState = spstate_idle ) then
if( SpPreReadCounter = "00000" ) then
SpPreReadState <= spstate_yread;
SpCCis0 <= '0';
SpDispEnd <= '0';
for i in 0 to SpMode2_nSprites - 1 loop
SpPattern(i) <= (others =>'0');
end loop;
end if;
elsif( SpPreReading = '1' ) then
case SpPreReadState is
when spstate_yread =>
if( SpDispEnd = '1' ) then
SpPreReadState <= spstate_idle;
elsif( (SpPreReadY( 7 downto 3) = "00000") and (VdpR1SpSize = '0' ) and (VdpR1SpZoom='0') )then
SpPreReadState <= spstate_xread;
elsif( (SpPreReadY( 7 downto 4) = "0000") and (VdpR1SpSize = '1' ) and (VdpR1SpZoom='0') )then
SpPreReadState <= spstate_xread;
elsif( (SpPreReadY( 7 downto 4) = "0000") and (VdpR1SpSize = '0' ) and (VdpR1SpZoom='1') )then
SpPreReadState <= spstate_xread;
SpPreReadY <= '0' & SpPreReadY(7 downto 1);
elsif( (SpPreReadY( 7 downto 5) = "000") and (VdpR1SpSize = '1' ) and (VdpR1SpZoom='1') )then
SpPreReadState <= spstate_xread;
SpPreReadY <= '0' & SpPreReadY(7 downto 1);
else
if( SpPreReadCounter = "11111" ) then
SpPreReadState <= spstate_idle;
else
SpPreReadState <= spstate_yread;
SpPreReadCounter <= SpPreReadCounter + 1;
-- 連続したスプライトプレーンが表示されない時、SpCCis0 をクリア
SpCCis0 <= '0';
end if;
end if;
when spstate_xread =>
SpPreReadState <= spstate_ptnnumread;
when spstate_ptnnumread =>
SpPreReadState <= spstate_colorread;
when spstate_colorread =>
SpPreReadState <= spstate_ptnread1;
when spstate_ptnread1 =>
SpPreReadState <= spstate_ptnread2;
when spstate_ptnread2 =>
if( (SpMode2='0') and (SpPreReadCounter2 = "0011") ) then
-- 横４つ分のスプライトを読んだ
SpPreReadState <= spstate_idle;
-- elsif( (SpMode2='1' and SpPreReadCounter2 = "0111") ) then
elsif( (SpMode2='1') and (SpPreReadCounter2 = SpMode2_nSprites-1) ) then
-- 横８つ分のスプライトを読んだ
SpPreReadState <= spstate_idle;
elsif( SpPreReadCounter = "11111" ) then
SpPreReadState <= spstate_idle;
else
SpPreReadCounter <= SpPreReadCounter + 1;
SpPreReadCounter2 <= SpPreReadCounter2 + 1;
SpPreReadState <= spstate_yread;
end if;
when others =>
null;
end case;
end if;
when others =>
null;
end case;
end if;
end process;
pSltRsv5 <= '1';
pSltRsv16 <= '1';
pSltBdir_n <= '0' when pSltSltsl_n = '0' and pSltRd_n = '0' else '1';
pSltDat <= (others => 'Z');
-- MSX slot access
IopAcs <= '1' when IopAcs0 = '1' and IopAcs1 = '0' else '0';
IopAcs0 <= '1' when pSltIorq_n = '0' and (pSltRd_n = '0' or pSltWr_n = '0') else '0';
process(pSltClk, pSltRst_n)
begin
if (pSltRst_n = '0') then
IopAcs1 <= '0';
elsif (pSltClk'event and pSltClk = '1') then
IopAcs1 <= IopAcs0;
end if;
end process;
-- VDP register access
process( pSltClk, pSltRst_n )
begin
if (pSltRst_n = '0') then
VdpP1Is1stByte <= '1';
VdpP2Is1stByte <= '1';
VdpRegWrPulse <= '0';
VdpVramAddrSetReq <= '0';
VdpVramWrReq <= '0';
VdpVramAddrSetAck <= '0';
VdpVramAccessRw <= '0';
VdpVramAccessAddr <= (others => '0');
VdpVramAccessAddrTmp <= (others => '0');
VdpR0DispNum <= (others => '0');
VdpR1DispMode <= (others => '0');
VdpR1SpSize <= '0';
VdpR1SpZoom <= '0';
VdpR1DispOn <= '0';
VdpR2PtnNameTblBaseAddr <= (others => '0');
VdpR4PtnGeneTblBaseAddr <= (others => '0');
VdpR10R3ColorTblBaseAddr <= (others => '0');
VdpR11R5SpAttrTblBaseAddr <= (others => '0');
VdpR6SpPtnGeneTblBaseAddr <= (others => '0');
VdpR7FrameColor <= (others => '0');
VdpR8SpOff <= '0';
VdpR9TwoPageMode <= '0';
VdpR9InterraceMode <= '0';
VdpR9YDots <= '0';
VdpR16PalNum <= (others => '0');
VdpR17RegNum <= (others => '0');
VdpR17IncRegNum <= '0';
VdpR23VStartLine <= (others => '0');
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '0';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '0';
-- adjust
adjust_x <= OFFSET_X;
adjust_y <= OFFSET_Y;
elsif (pSltClk'event and pSltClk = '1') then
if( IopAcs = '1' and pSltWr_n = '0' and pSltAdr(7 downto 0) = "10011000") then
-- port#0 write ( 0x88 for MSX1 アダプタ, 0x98 for MSX2 )
VdpVramWrReq <= not VdpVramWrAck;
-- VdpP0Data <= pSltDat( 7 downto 0);
VdpVramAccessData <= pSltDat( 7 downto 0);
if( VdpVramAddrSetReq /= VdpVramAddrSetAck ) then
VdpVramAccessAddr <= VdpVramAccessAddrTmp;
VdpVramAddrSetAck <= not VdpVramAddrSetAck;
else
VdpVramAccessAddr <= VdpVramAccessAddr + 1;
end if;
elsif( IopAcs = '1' and pSltRd_n = '0' and pSltAdr(7 downto 0) = "10011000") then
-- port#0 read
null;
elsif( IopAcs = '1' and pSltWr_n = '0' and pSltAdr(7 downto 0) = "10011001") then
-- port#1 write
case VdpP1Is1stByte is
when '1' =>
VdpP1Data <= pSltDat( 7 downto 0);
VdpP1Is1stByte <= '0';
when '0' =>
case pSltDat( 7 downto 6 ) is
when "01" => -- set vram access address(write)
VdpVramAccessAddrTmp( 7 downto 0 ) <= VdpP1Data( 7 downto 0);
VdpVramAccessAddrTmp(13 downto 8 ) <= pSltDat( 5 downto 0);
VdpVramAddrSetReq <= not VdpVramAddrSetAck;
VdpVramAccessRw <= '0';
when "00" => -- set vram access address(read)
VdpVramAccessAddrTmp( 7 downto 0 ) <= VdpP1Data( 7 downto 0);
VdpVramAccessAddrTmp(13 downto 8 ) <= pSltDat( 5 downto 0);
VdpVramAddrSetReq <= not VdpVramAddrSetAck;
VdpVramAccessRw <= '1';
when "10" => -- chokusetsu register shitei
VdpRegPtr <= pSltDat( 5 downto 0);
VdpRegWrPulse <= '1';
when others =>
null;
end case;
VdpP1Is1stByte <= '1';
when others =>
null;
end case;
elsif( IopAcs = '1' and pSltRd_n = '0' and pSltAdr(7 downto 0) = "10011001") then
--- port#1 read
VdpP1Is1stByte <= '1';
elsif( IopAcs = '1' and pSltWr_n = '0' and pSltAdr(7 downto 0) = "10011010") then
--- port#2 write
case VdpP2Is1stByte is
when '1' =>
paletteR(conv_integer(VdpR16PalNum)) <= pSltDat(6 downto 4);
paletteB(conv_integer(VdpR16PalNum)) <= pSltDat(2 downto 0);
VdpP2Is1stByte <= '0';
when '0' =>
paletteG(conv_integer(VdpR16PalNum)) <= pSltDat(2 downto 0);
VdpP2Is1stByte <= '1';
when others =>
null;
end case;
elsif( IopAcs = '1' and pSltRd_n = '0' and pSltAdr(7 downto 0) = "10011010") then
--- port#2 read
null;
elsif( IopAcs = '1' and pSltWr_n = '0' and pSltAdr(7 downto 0) = "10011011") then
--- port#3 write
if( VdpR17RegNum /= "010001" ) then
VdpRegWrPulse <= '1';
end if;
VdpP1Data <= pSltDat( 7 downto 0);
VdpRegPtr <= VdpR17RegNum;
if( VdpR17IncRegNum = '1' ) then
VdpR17RegNum <= VdpR17RegNum + 1;
end if;
elsif( IopAcs = '1' and pSltRd_n = '0' and pSltAdr(7 downto 0) = "10011011") then
--- port#3 read
null;
elsif( VdpRegWrPulse = '1' ) then
-- register write
VdpRegWrPulse <= '0';
case VdpRegPtr is
when "000000" => -- #00
VdpR0DispNum <= VdpP1Data(3 downto 1);
if( VdpR1DispMode = "00" ) then
case( VdpP1Data(3 downto 1) ) is
when "000" =>
-- screen 1
VdpModeGraphic1 <= '1';
VdpModeGraphic2 <= '0';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '0';
SpMode2 <= '0';
when "001" =>
-- screen 2
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '1';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '0';
SpMode2 <= '0';
when "010" =>
-- screen 4
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '1';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '0';
SpMode2 <= '1';
when "011" =>
-- screen 5
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '0';
VdpModeGraphic4 <= '1';
VdpModeGraphic7 <= '0';
SpMode2 <= '1';
when "111" =>
-- screen 8
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '0';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '1';
SpMode2 <= '1';
when others =>
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '0';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '0';
SpMode2 <= '0';
end case;
elsif( VdpR1DispMode = "10" ) then
-- text1,text2 mode
null;
else
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '0';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '0';
SpMode2 <= '0';
end if;
when "000001" => -- #01
VdpR1SpZoom <= VdpP1Data(0);
VdpR1SpSize <= VdpP1Data(1);
VdpR1DispMode <= VdpP1Data(4 downto 3);
VdpR1DispOn <= VdpP1Data(6);
if( VdpP1Data(4 downto 3) = "00" ) then
case( VdpR0DispNum ) is
when "000" =>
-- screen 1
VdpModeGraphic1 <= '1';
VdpModeGraphic2 <= '0';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '0';
SpMode2 <= '0';
when "001" =>
-- screen 2
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '1';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '0';
SpMode2 <= '0';
when "010" =>
-- screen 4
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '1';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '0';
SpMode2 <= '1';
when "011" =>
-- screen 5
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '0';
VdpModeGraphic4 <= '1';
VdpModeGraphic7 <= '0';
SpMode2 <= '1';
when "111" =>
-- screen 8
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '0';
VdpModeGraphic4 <= '0';
VdpModeGraphic7 <= '1';
SpMode2 <= '1';
when others =>
VdpModeGraphic1 <= '0';
VdpModeGraphic2 <= '0';
VdpModeGraphic7 <= '0';
SpMode2 <= '0';
end case;
end if;
when "000010" => -- #02
VdpR2PtnNameTblBaseAddr <= VdpP1Data( 6 downto 0);
when "000011" => -- #03
VdpR10R3ColorTblBaseAddr(7 downto 0) <= VdpP1Data( 7 downto 0);
when "000100" => -- #04
VdpR4PtnGeneTblBaseAddr <= VdpP1Data( 5 downto 0);
when "000101" => -- #05
VdpR11R5SpAttrTblBaseAddr( 4 downto 0) <= VdpP1Data( 7 downto 3);
when "000110" => -- #06
VdpR6SpPtnGeneTblBaseAddr <= VdpP1Data( 5 downto 0);
when "000111" => -- #07
VdpR7FrameColor <= VdpP1Data( 7 downto 0 );
when "001000" => -- #08
VdpR8SpOff <= VdpP1Data(1);
when "001001" => -- #09
VdpR9TwoPageMode <= VdpP1Data(2);
VdpR9InterraceMode <= VdpP1Data(3);
VdpR9YDots <= VdpP1Data(7);
when "001010" => -- #10
VdpR10R3ColorTblBaseAddr(10 downto 8) <= VdpP1Data( 2 downto 0);
when "001011" => -- #11
VdpR11R5SpAttrTblBaseAddr( 6 downto 5) <= VdpP1Data( 1 downto 0);
when "001110" => -- #14
VdpVramAccessAddrTmp( 16 downto 14 ) <= VdpP1Data( 2 downto 0);
VdpVramAddrSetReq <= not VdpVramAddrSetAck;
when "010000" => -- #16
VdpR16PalNum <= VdpP1Data( 3 downto 0 );
when "010001" => -- #17
VdpR17RegNum <= VdpP1Data( 5 downto 0 );
VdpR17IncRegNum <= not VdpP1Data(7);
when "010010" => -- #18
adjust_x <= OFFSET_X - (VdpP1Data(3) & VdpP1Data(3) & VdpP1Data(3) & VdpP1Data(3 downto 0) );
adjust_y <= OFFSET_Y - (VdpP1Data(7) & VdpP1Data(7) & VdpP1Data(7) & VdpP1Data(7 downto 4) );
when "010111" => -- #23
-- VdpR23VStartLine <= VdpP1Data;
null;
when others => null;
end case;
end if;
end if;
end process;
end RTL;